1. Field of the Invention
The present invention relates to a device for reducing flickers of a liquid crystal display panel and a method for reducing flickers of a liquid crystal display panel, and particularly to a device and a method that can utilize each of a plurality of blocks of the liquid crystal display panel to correspond to a respective common voltage to reduce flickers of the liquid crystal display panel.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a plurality of pixels included by a liquid crystal display panel. As shown in FIG. 1, each pixel includes a thin film transistor 102, a liquid crystal capacitor CLC, and a storage capacitor CS, where a gate G of the thin film transistor 102 is coupled to a gate line G1, a source S of the thin film transistor 102 is coupled to a data line D1, and a drain D of the thin film transistor 102 is coupled to a liquid crystal capacitor CLC and a storage capacitor CS. In addition, another terminal of the liquid crystal capacitor CLC and another terminal of the storage capacitor CS are coupled to a common electrode COM.
Please refer to FIG. 2. FIG. 2 is a diagram illustrating a pixel 200 of a liquid crystal display panel. As shown in FIG. 2, the pixel 200 includes a thin film transistor 202, a liquid crystal capacitor CLC, and a storage capacitor CS, where a gate G of the thin film transistor 202 is coupled to a gate line G1, a source S of the thin film transistor 202 is coupled to a data line D1, and a drain D of the thin film transistor 202 is coupled to a liquid crystal capacitor CLC and a storage capacitor CS, where a parasitic capacitor Cgd exists between the gate G and the drain D of the thin film transistor 202. In addition, another terminal of the liquid crystal capacitor CLC and another terminal of the storage capacitor CS are coupled to a common electrode COM.
FIG. 3 is a diagram illustrating relationships of a voltage stored in the storage capacitor CS and the liquid crystal capacitor CLC, a data voltage VDATA of the data line D1, a common voltage VCOM, a high gate voltage VGH and a low gate voltage VGL of the gate line G1 in FIG. 2. As shown in FIG. 3, when the liquid crystal display panel displays an Nth frame, the thin film transistor 202 is turned on according to the high gate voltage VGH of the gate line G1, so the data voltage VDATA of the data line D1 charges the liquid crystal capacitor CLC and the storage capacitor CS. Meanwhile, a voltage of the drain D of the thin film transistor 202 is gradually increased to a voltage VP1. When the thin film transistor 202 is turned off according to the low gate voltage VGL of the gate line G1, the voltage of the drain D of the thin film transistor 202 instantly reduces a feed through voltage ΔVP due to a capacitive effect of the parasitic capacitor Cgd. That is to say, the voltage the drain D of the thin film transistor 202 is decreased to a voltage VP2. Similarly, when the liquid crystal display panel displays an (N+1)th frame, the voltage of the drain D of the thin film transistor 202 also exhibits the feed through voltage ΔVP. Thus, the liquid crystal display panel has flickers because a positive feed through voltage ΔVPP is unequal to a negative feed through voltage ΔVPN. In addition, the feed through voltage ΔVP is determined by conservation of charge and equation (1):
                              Δ          ⁢                                          ⁢          VP                =                                            C              ⁢                                                          ⁢              gd                                                      C                ⁢                                                                  ⁢                gd                            +              CLC              +              CS                                ⁢          Δ          ⁢                                          ⁢          VG                                    (        1        )            
As shown in equation (1), ΔVP=VP1−VP2, and ΔVG=VGH−VGL.
As shown in FIG. 3 and equation (1), when the common voltage VCOM provided by the common electrode COM is a direct current voltage, a liquid crystal display panel designer can compensate flickers of the liquid crystal display panel caused by the feed through Voltage ΔVP by adjusting a direct current level of the common voltage VCOM to let the positive feed through voltage ΔVPP be equal to the negative feed through voltage ΔVPN. Meanwhile, the common voltage VCOM is determined by equation (2):
                              Δ          ⁢                                          ⁢          VCOM                =                                            Δ              ⁢                                                          ⁢              VDATA                        2                    -                      Δ            ⁢                                                  ⁢            VP                                              (        2        )            
As shown in FIG. 3, ΔVDATA is a difference between a high voltage and a low voltage of the data line D1.
Please refer to FIG. 4. FIG. 4 is a diagram illustrating a liquid crystal display panel 400 having different feed through voltages. A plurality of blocks B1-B5 of the liquid crystal display panel 400 have different parasitic capacitors due to a liquid crystal display panel process. For example, capacitances of parasitic capacitors of the block B1 and the block B5 are smaller, and a capacitance of a parasitic capacitor of the block B3 is greater. Therefore, as shown in FIG. 4, because the plurality of blocks B1-B5 have different parasitic capacitors, the plurality of blocks B1-B5 have different feed through voltages ΔVP1-ΔVP5. For example, the feed through voltage ΔVP3 of the block B3 is the greatest, the feed through voltage ΔVP1 of the block B1 and the feed through voltage ΔVP5 of the block B5 are the smallest, and the feed through voltage ΔVP2 of the block B2 and the feed through voltage ΔVP4 of the block B4 exist between the feed through voltage ΔVP3 and the feed through voltage ΔVP1, the feed through voltage ΔVP5.
Please refer to FIG. 5. FIG. 5 is a diagram illustrating the liquid crystal display panel 400 still having flickers after the common voltage VCOM of the liquid crystal display panel 400 is adjusted. As shown in FIG. 5, when a designer of the liquid crystal display panel 400 adjusts the common voltage VCOM to let the block B3 not have flickers, because the plurality of blocks B1-B5 have the different feed through voltages ΔVP1-ΔVP5, the block B1 still has flickers due to a positive feed through voltage ΔVPP1 being not equal to a negative feed through voltage ΔVPN1. Similarly, the block B2, the block B4, the block B5, and the block B1 also have flickers.
Therefore, the designer of the liquid crystal display panel can not compensate flickers of the liquid crystal display caused by the feed through voltage by adjusting the direct current level of the common voltage VCOM.